Pa Risc

The Precision Architecture ReducedInstructionSetComputer processor was designed by HewlettPackard for use in their Unix-based workstations.

It has 32 general purpose 32-bit registers (no windowing) and a rather complete instruction set for a RISC processor.

On the interest and performance scales what sets the PaRisc architecture apart from the Alpha and Sparcs?

As far as I recall, it had the distinguishing feature that C function activations did not store a frame pointer to the calling frame unless they absolutely had to. I can't remember how it avoided storing the frame pointer, or what situations required a frame pointer to be present. And this is probably more a feature of HP's C compiler than the chip itself. But hey, that's about all I can remember about the PA-RISC, apart from the fact that it was faster than the SPARC but, when the Alpha was released, slower than the Alpha.

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